Dane Sabo 2497bb4aa5 Auto sync: 2025-11-12 15:59:19 (110 files changed)
M  .task/backlog.data

M  .task/completed.data

M  .task/pending.data

M  .task/undo.data

A  PLAN_OF_STUDY_111225.pdf

R  Writing/202510270-Emerson-Pres/SaboOneSlide.pdf -> Presentations/202510270-Emerson-Pres/SaboOneSlide.pdf

R  Writing/202510270-Emerson-Pres/beamerthemedane.sty -> Presentations/202510270-Emerson-Pres/beamerthemedane.sty

R  Writing/202510270-Emerson-Pres/beamerthemedane_native.sty -> Presentations/202510270-Emerson-Pres/beamerthemedane_native.sty
2025-11-12 15:59:19 -05:00

61 lines
2.1 KiB
TeX

% Expected Outcomes
\begin{frame}{Success measured by progression to TRL 5---practical feasibility beyond theory}
\begin{center}
\begin{tikzpicture}[scale=0.9, transform shape]
\draw[->, >=stealth, very thick] (0,0) -- (11,0) node[right] {TRL};
% TRL markers
\foreach \x/\label in {1/1, 3/2-3, 5.5/4, 8/5, 10/6} {
\draw[thick] (\x,0.1) -- (\x,-0.1);
\node[below] at (\x,-0.2) {\small\label};
}
% Starting point
\node[circle, fill=red, minimum size=0.3cm, label=above:{\small Current}] at (3,0) {};
\node[below=1cm of {(3,0)}, align=center, font=\tiny] {HARDENS\\TRL 3-4};
% Target
\node[circle, fill=green, minimum size=0.3cm, label=above:{\small\textbf{Target}}] at (8,0) {};
\node[below=1cm of {(8,0)}, align=center, font=\tiny, text width=2.5cm] {Hardware-in-loop\\validated};
% Arrow
\draw[->, >=stealth, very thick, blue] (3.5,0.5) -- (7.5,0.5) node[midway, above] {\textbf{This Work}};
\end{tikzpicture}
\end{center}
\vspace{0.5cm}
\textbf{Three Deliverables:}
\begin{enumerate}
\item Procedure translation methodology
\item Continuous verification framework
\item SmAHTR demonstration on Emerson Ovation
\end{enumerate}
%SPEAKER NOTES: See comments below
%
\textbf{Technology Readiness Level Progression:}
Current: TRL 2-3 (basic concepts, HARDENS precedent)
Target: TRL 5 (validated prototype in relevant environment)
\textbf{Three Concrete Deliverables:}
1. Procedure Translation Methodology
- Engineers generate verified controllers from regulatory procedures
- No formal methods expertise required
2. Continuous Verification Framework
- Standard control design + iterative verification
- Mathematical proof of safe mode transitions
3. SmAHTR Hardware-in-the-Loop Demonstration
- Autonomous startup on industrial control hardware
- Real-time performance validation
- Clear path to deployment
\textbf{Key Message:} TRL 5 proves both theoretical validity and practical implementability
% (End of speaker notes)
\end{frame}