Dane Sabo
3299181c70
M lazy-lock.json M lua/custom/configs/lspconfig.lua M lua/custom/init.lua A lua/custom/journal.lua A nvim_venv/bin/Activate.ps1 A nvim_venv/bin/activate A nvim_venv/bin/activate.csh A nvim_venv/bin/activate.fish
256 lines
8.7 KiB
Python
256 lines
8.7 KiB
Python
"""Simulator data model classes."""
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from __future__ import annotations
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from collections.abc import Callable
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from dataclasses import dataclass
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from enum import Enum
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class SimDataType(Enum):
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"""Register types, used to define group of registers.
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This is the types pymodbus recognizes, actually the modbus standard do NOT define e.g. INT32,
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but since nearly every device have e.g. INT32 as part of its register map, it was decided to
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include it in pymodbus, with automatic conversions to/from registers.
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"""
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#: 1 integer == 1 register
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INT16 = 1
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#: 1 positive integer == 1 register
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UINT16 = 2
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#: 1 integer == 2 registers
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INT32 = 3
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#: 1 positive integer == 2 register2
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UINT32 = 4
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#: 1 integer == 4 registers
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INT64 = 5
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#: 1 positive integer == 4 register
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UINT64 = 6
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#: 1 float == 2 registers
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FLOAT32 = 7
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#: 1 float == 4 registers
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FLOAT64 = 8
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#: 1 string == len(string) / 2 registers
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#:
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#: .. tip:: String length must be a multiple of 2 (corresponding to registers).
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STRING = 9
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#: Shared mode: 16 bits == 1 register else 1 bit == 1 "register" (address)
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BITS = 10
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#: Raw registers
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#:
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#: .. warning:: Do not use as default, since it fills the memory and block other registrations.
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REGISTERS = 11
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#: Raw registers, but also sets register address limits.
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#:
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#: .. tip:: It a single but special register, and therefore improves speed and memory usage compared to REGISTERS.
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DEFAULT = 12
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@dataclass(frozen=True)
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class SimData:
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"""Configure a group of continuous identical registers.
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**Example**:
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.. code-block:: python
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SimData(
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start_register=100,
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count=5,
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value=-123456
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datatype=SimDataType.INT32
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)
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The above code defines 5 INT32, each with the value -123456, in total 20 registers.
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.. tip:: use SimDatatype.DEFAULT to define register limits:
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.. code-block:: python
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SimData(
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start_register=0, # First legal registers
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count=1000, # last legal register is start_register+count-1
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value=0x1234 # Default register value
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datatype=SimDataType.DEFAULT
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)
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The above code sets the range of legal registers to 0..9999 all with the value 0x1234.
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Accessing non-defined registers will cause an exception response.
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.. attention:: Using SimDataType.DEFAULT is a LOT more efficient to define all registers, than \
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the other datatypes. This is because default registers are not created unless written to, whereas \
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the registers of other datatypes are each created as objects.
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"""
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#: Address of first register, starting with 0.
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#:
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#: .. caution:: No default, must be defined.
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start_register: int
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#: Value of datatype, to initialize the registers (repeated with count, apart from string).
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#:
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#: Depending on in which block the object is used some value types are not legal e.g. float cannot
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#: be used to define coils.
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value: int | float | str | bool | bytes = 0
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#: Count of datatype e.g. count=3 datatype=SimdataType.INT32 is 6 registers.
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#:
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#: SimdataType.STR is special:
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#:
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#: - count=1, value="ABCD" is 2 registers
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#: - count=3, value="ABCD" is 6 registers, with "ABCD" repeated 3 times.
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count: int = 1
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#: Datatype, used to check access and calculate register count.
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#:
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#: .. note:: Default is SimDataType.REGISTERS
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datatype: SimDataType = SimDataType.REGISTERS
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#: Optional function to call when registers are being read/written.
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#:
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#: **Example function:**
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#:
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#: .. code-block:: python
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#:
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#: def my_action(
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#: addr: int,
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#: value: int | float | str | bool | bytes
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#: ) -> int | float | str | bool | bytes:
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#: return value + 1
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#:
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#: .. tip:: use functools.partial to add extra parameters if needed.
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action: Callable[[int, int | float | str | bool | bytes], int | float | str | bool | bytes] | None = None
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def __post_init__(self):
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"""Define a group of registers."""
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if not isinstance(self.start_register, int) or not 0 <= self.start_register < 65535:
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raise TypeError("0 <= start_register < 65535")
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if not isinstance(self.count, int) or not 0 < self.count <= 65535:
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raise TypeError("0 < count <= 65535")
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if not isinstance(self.datatype, SimDataType):
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raise TypeError("datatype not SimDataType")
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if self.action and not callable(self.action):
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raise TypeError("action not Callable")
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@dataclass(frozen=True)
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class SimDevice:
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"""Configure a device with parameters and registers.
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Registers can be defined as shared or as 4 separate blocks.
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shared_block means all requests access the same registers,
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allowing e.g. coils to be read as a holding register (except if type_checking is True).
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.. warning:: Shared mode cannot be mixed with non-shared mode !
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In shared mode, individual coils/direct input cannot be addressed directly ! Instead
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the register address is used with count. In non-shared mode coils/direct input can be
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addressed directly.
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**Device with shared registers**::
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SimDevice(
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id=0,
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block_shared=[SimData(...)]
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)
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**Device with non-shared registers**::
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SimDevice(
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id=0,
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block_coil=[SimData(...)],
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block_direct=[SimData(...)],
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block_holding=[SimData(...)],
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block_input=[SimData(...)],
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)
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A server can contain either a single :class:`SimDevice` or list of :class:`SimDevice` to simulate a
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multipoint line.
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"""
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#: Address of device
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#:
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#: Default 0 means accept all devices, except those defined in the same server.
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#:
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#: .. warning:: A server with a single device id=0 accept all requests.
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id: int = 0
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#: Enforce type checking, if True access are controlled to be conform with datatypes.
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#:
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#: Used to control that read_coils do not access a register defined as holding and visaversa
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type_check: bool = False
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#: Use this block for shared registers (Modern devices).
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#:
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#: Requests accesses all registers in this block.
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#:
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#: .. warning:: cannot be used together with other block_* parameters!
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block_shared: list[SimData] | None = None
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#: Use this block for non-shared registers (very old devices).
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#:
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#: In this block an address is a single coil, there are no registers.
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#:
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#: Request of type read/write_coil accesses this block.
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#:
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#: .. tip:: block_coil/direct/holding/input must all be defined
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block_coil: list[SimData] | None = None
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#: Use this block for non-shared registers (very old devices).
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#:
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#: In this block an address is a single direct relay, there are no registers.
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#:
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#: Request of type read/write_direct_input accesses this block.
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#:
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#: .. tip:: block_coil/direct/holding/input must all be defined
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block_direct: list[SimData] | None = None
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#: Use this block for non-shared registers (very old devices).
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#:
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#: In this block an address is a register.
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#:
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#: Request of type read/write_holding accesses this block.
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#:
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#: .. tip:: block_coil/direct/holding/input must all be defined
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block_holding: list[SimData] | None = None
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#: Use this block for non-shared registers (very old devices).
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#:
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#: In this block an address is a register.
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#:
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#: Request of type read/write_input accesses this block.
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#:
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#: .. tip:: block_coil/direct/holding/input must all be defined
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block_input: list[SimData] | None = None
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def __post_init__(self):
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"""Define a device."""
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if not isinstance(self.id, int) or not 0 <= self.id < 255:
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raise TypeError("0 <= id < 255")
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blocks = [(self.block_shared, "shared")]
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if self.block_shared:
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if self.block_coil or self.block_direct or self.block_holding or self.block_input:
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raise TypeError("block_* cannot be used with block_shared")
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else:
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blocks = [
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(self.block_coil, "coil"),
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(self.block_direct, "direct"),
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(self.block_holding, "holding"),
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(self.block_input, "input")]
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for block, name in blocks:
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if not block:
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raise TypeError(f"block_{name} not defined")
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if not isinstance(block, list):
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raise TypeError(f"block_{name} not a list")
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for entry in block:
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if not isinstance(entry, SimData):
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raise TypeError(f"block_{name} contains non SimData entries")
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def SimCheckConfig(devices: list[SimDevice]) -> bool:
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"""Verify configuration."""
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_ = devices
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return False
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