ADC stuff
This commit is contained in:
parent
f616e4290d
commit
d4fd87672a
@ -1,9 +1,74 @@
|
||||
#Reading #Sensors #ADC
|
||||
|
||||
The quick brown fox jumps over the lazy dog. The dog stays blissfully asleep. :)
|
||||
# 4.1 Input Characteristics of Interface Circuits
|
||||
|
||||
*What is an interface circuit?*
|
||||
|
||||
Interface circuits are almost always required to make use of a sensor. Sensor signals are
|
||||
usually, very small currents or voltages, have a significant amount of noise in them, and
|
||||
may be very sensitive to circuit conditions.
|
||||
Interface circuits are almost always required to make use of a sensor. Sensor
|
||||
signals are usually, very small currents or voltages, have a significant amount
|
||||
of noise in them, and may be very sensitive to circuit conditions. This is a
|
||||
lot of what this first section talks about: why do sensors need interface
|
||||
circuits, and what pieces make up these circuits?
|
||||
|
||||
A primary reason interface circuits exist is because sensor dynamics often use
|
||||
different physical phenomena than may be desired. For example, most thermistors
|
||||
use resistance to measure temperature, but resistance is not a quantity that can
|
||||
be directly observed by a microcontroller. Instead, this resistance must be
|
||||
converted into a voltage signal that a microcontroller can read. This, in a way
|
||||
that maintains a non-interfering level of current or 'load' into the sensor,
|
||||
is what an interface circuit must do.
|
||||
|
||||
Interface circuits can be either extremely technical and detailed, or simple
|
||||
and crude. Extremely well designed interface circuits will carefully orient
|
||||
traces of a board s.t. signals between PCB layers will not interfere with sensor
|
||||
dynamics.
|
||||
|
||||
## 4.2 Amplifiers
|
||||
This chapter covers operational amplifiers, which the author calls an OPAM as
|
||||
opposed to op-amp name I have been taught. OPAMs have a few key characteristics:
|
||||
|
||||
1. They have extremely high input impedance
|
||||
2. The input bias current is very low
|
||||
3. They are stable to a large range of supply conditions
|
||||
4. They are stable to a large range of environmental conditions
|
||||
5. And more things that are discussed in the book...
|
||||
|
||||
The author then talks about a series of different OPAM configurations and how
|
||||
they are used in practice.
|
||||
|
||||
## 4.3 Excitation Circuits
|
||||
*I have not read this 3/24*
|
||||
|
||||
## 4.4 Analog to Digital Converters
|
||||
Analog to digital converters (ADC) are a critical piece of an interface circuit
|
||||
when the continuous time sensors interact with a discrete controller or storage
|
||||
device, such as a modern computer. They convert a reference signal (usually a
|
||||
voltage), and turn it into a binary number that a computer can read. These ADC
|
||||
converters usually output a value between 0 and using fractional binary numbers,
|
||||
where 0 indicates the minimum value, and 1 the saturation / reference / maximum
|
||||
value.
|
||||
|
||||
### 4.4.4 Successive Approximation Converter
|
||||
This type of ADC is very common in a monolithic form. These ADC work by using a
|
||||
comparator with precise reference voltages to evaluate the closest digital
|
||||
equivalent of the measured signal. These ADC start with the most significant bit
|
||||
(MSB), and iterate through all possible test bits to determine the final binary
|
||||
number. These ADC take time to do these comparisons, and as such have two distinct
|
||||
features: 1) They use a sample-and-hold architecture, and 2) they take several
|
||||
clock cycles to obtain a measurement.
|
||||
|
||||
The SAC ADC has to perform its approximation over several time steps by its nature
|
||||
of being a digital system. The sensor signal however, may change in this time, and
|
||||
if a high-frequency noise is included, may wildly vary between successive
|
||||
approximations. Because of this, the SAC ADC includes a circuit that holds the
|
||||
measurement for a certain sample while the SAC is performed. At the end of the
|
||||
sampling, the sample-and-hold is then cleared. This memory is analog.
|
||||
|
||||
Clock cycles determine the time steps for each successive approximation in the ADC,
|
||||
and because these are often built into an existing microcontroller or chip, they
|
||||
often share the clock cycle of the larger device. This creates an issue that the
|
||||
larger system has to wait for the ADC to finish before it can access the
|
||||
measurement. This means that the speed of the control system is ultimately determined
|
||||
by the speed of the ADC.
|
||||
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user