62 lines
1.5 KiB
Matlab
62 lines
1.5 KiB
Matlab
close all
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% The quick brown fox jumps over the lazy dog. The dog stays blissfully asleep. :)
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% Dane Sabo
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% ME 2046 Final Project Code
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%% System Setup
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% Continuous System
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J = 0.01; %kgm^2
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C = 0.004; %Nm/(rad/s)
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K = 10; %Nm/rad
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K_i = 0.05; %Nm/rad
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F = [0 1; -K/J -C/J];
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G = [0; K_i/J];
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G_disturb = [0; 1/J];
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C = [1 0];
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D = 0;
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sys_cont = ss(F, G, C, D);
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% Digital System Conversion
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Ts_whole_register = 1/15e3; %s
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sys_whole_register = c2d(sys_cont, Ts_whole_register, 'zoh');
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% Assume a 12-bit SAR ADC with bits 0-3 in first, bits 4-7 in 2nd, 8-11 in 3rd
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Ts_third_register = Ts_whole_register/3;
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sys_third_register = c2d(sys_cont, Ts_third_register, 'zoh');
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% Create a Reference Signal
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max_time = 1e-2;
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[ref, t, N] = make_hdd_reference(max_time, Ts_whole_register, 1e-2, 42);
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[ref_third, t_third, N_third] = make_hdd_reference(9*Ts_third_register, Ts_third_register, 1e-2, 42);
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%% Running a Simulation
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% ADC Delay, no sub-steps - Setting Up Simulation
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opts = struct(); % start empty
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opts.sys = sys_whole_register;
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opts.x0 = [0; 0];
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opts.N = N;
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opts.K = [0.7+1e-4i 0.7-1e-4i];
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opts.L = [0.1+0.01i 0.1-0.01i];
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opts.r = ref;
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opts.plotting = false;
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[x_hist, y_hist, u_hist, x_hat_hist] = solve_full_step(opts);
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% ADC delay, with sub-steps
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opts.K = [0.7+1e-4i 0.7-1e-4i];
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opts.L = [0.4+0.01i 0.4-0.01i];
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opts.sys = sys_third_register;
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opts.sub_steps = 3;
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opts.r = ref_third;
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opts.N = N_third/3;
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opts.res = 12;
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opts.plotting = true;
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[x_hist, y_hist, u_hist, x_hat_hist] = solve_sub_step(opts);
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